SAN FRANCISCO – Intel will demonstrate an experimental computer chip Monday with 80 separate processing engines, or cores, that company executives said provided a model for commercial chips that would be used widely in standard desktop, laptop and server computers within five years.
While the chip is not compatible with Intel’s current chips, the company said it had already begun design work on a commercial version that would essentially have dozens or even hundreds of Intel-compatible microprocessors laid out in a tiled pattern on a single chip.
The chip design is intended to exploit a generation of manufacturing technology that the company introduced last month. Intel said it had changed the basic design of transistors in such a way that it would be able to continue to shrink them — offering lower power and higher speeds — for at least another half decade or more.
Nitan Borkar, one of the chip’s designers, showed an air-cooled computer based on the chip running a simple scientific calculation last week at speeds above one trillion mathematical calculations a second. Such computing power matches the speed of the world’s fastest supercomputer of just a decade ago. But Intel acknowledged that the experimental chip was missing the peripheral equipment and interfaces necessary to do real computing work.
During a demonstration Thursday, Justin Rattner, the chief technology officer at Intel, showed several futuristic computing applications for which he said the new chip design would be appropriate. One of the applications was a sports summarization tool that would allow viewers to create a digital highlights video automatically, featuring their favorite players.
A second demonstration showed motion capture technology — a technique widely used by the video game industry — relying only on digital video cameras and computers. Currently, conventional motion capture technology requires a complex array of sensors pinned to an actor’s body and face to capture a digital video that can be used interactively.
In the future, Rattner said, it will be possible to blend synthesized and real- time video. “Imagine learning to dance with a virtual instructor,” he said.
In leaping beyond the two- and four- engine, or core, microprocessors that are being manufactured by Intel and its chief industry competitor, Advanced Micro Devices, Intel is following a design trend that is sweeping the computing world.
Already, computer networking companies and the makers of PC graphics cards are moving to processor designs that have hundreds of computing engines. For example, Cisco Systems now uses a chip called Metro with 192 cores in its high-end network routers. In November, Nvidia introduced its most powerful graphics processor, the GeForce 8800, which has 128 cores.
The shift toward systems with hundreds or even thousands of computing cores is an opportunity as well as a potential crisis, computer scientists said, because no one has shown how to program such chips for many applications.
“If we can figure out how to program thousands of cores on a chip, the future looks rosy,” said David Patterson, a computer scientist at the University of California in Berkeley and the co-author of one of the standard textbooks on microprocessor design.
“If we can’t figure it out, then things look dark,” he said.
In addition to new kinds of computing applications, Rattner said the “network-on-chip” Teraflop processor would be ideal for the kind of heterogeneous computing that is increasingly common in the corporate world.
Large data centers now routinely use a software technique called “virtualization” to run many operating systems on a single processor to gain computing efficiency. Having hundreds or thousands of cores available would vastly increase the power of this style of computing.
One of the most impressive technical achievements made by the Intel researchers was the speed with which they are able to move data between the separate processors on the chip, Patterson said.
The Teraflops chip, which consumes just 62 watts at teraflop speeds and is air-cooled, contains an internal data packet router in each processor tile. It can move data between tiles in as little as 1.25 nanoseconds, making it possible to transfer 80 billion bytes a second between the internal cores.
The chip also contains an interface capability that would make it possible for Intel to package a memory chip stacked directly on top of the microprocessor in the future. Such a design would make it possible to move data back and forth between memory and processor many times faster than today’s chips.
Both Intel and Advanced Micro Devices are to describe new power-saving features that will make it possible for entire sections of future microprocessors to be shut down when they are not being used.
The AMD technology will be used in its four-core microprocessor code- named Barcelona, which the company has said will be commercially available in the middle of this year.
Fuente: International Herald Tribune